The invention relates to chemical mechanical polishing (CMP) of semiconductor wafer materials and, more particularly, to CMP compositions and methods for polishing metal interconnects on semiconductor wafers in the presence of dielectrics or barrier materials.
Typically, a semiconductor wafer is a wafer of silicon with a dielectric layer containing multiple trenches arranged to form a pattern for circuit interconnects within the dielectric layer. The pattern arrangements usually have a damascene structure or dual damascene structure. A barrier layer covers the patterned dielectric layer and a metal layer covers the barrier layer. The metal layer has at least sufficient thickness to fill the patterned trenches with metal to form circuit interconnects.
CMP processes often include multiple polishing steps. For example, a first step removes excess interconnect metals, such as copper at an initial high rate. After the first step removal, a second step polishing can remove metal that remains on the barrier layer outside of the metal interconnects. Subsequent polishing removes the barrier from an underlying dielectric layer of a semiconductor wafer to provide a planar polished surface on the dielectric layer and the metal interconnects.
The metal in a trench or trough on the semiconductor substrate provides a metal line forming a metal circuit. One of the problems to be overcome is that the polishing operation tends to remove metal from each trench or trough, causing recessed dishing of such metal. Dishing is undesirable as it causes variations in the critical dimensions of the metal circuit. To reduce dishing, polishing is performed at a lower polishing pressure. However, merely reducing the polishing pressure would require that polishing continue for a lengthened duration. However, dishing would continue to be produced for the entire lengthened duration of polishing, thus producing little gain in performance.
U.S. Pat. No. 7,086,935 (Wang) describes the use of an abrasive-free copper formulation containing methyl cellulose, an acrylic acid/methacrylic acid copolymer, benzotriazole (BTA) and miscible solvent for patterned wafers. This formula is capable of removing and clearing copper with low copper dishing, but during rapid polishing, it precipitates a green Cu-BTA compound on the polishing pad and wafer. These precipitates require a post-polishing cleaning of the polishing pad to avoid a decrease in polishing removal rate associated with the gum-like precipitate; and they require a post-polishing cleaning of the wafer with to avoid defect creation. These cleaning steps require strong and costly cleaning solutions and have an associated “cost of ownership” arising from the delayed wafer throughput.
There is a need for polishing compositions that clears copper with low defectivity, low copper dishing, low erosion; and all without the precipitation of Cu-BTA precipitate. Furthermore, there is a desire for these polishing attribute in a low-scratching formulation.